Job Overview
Employment Type
Full-time
Compensation
Salary
Range $122,440.00 - $172,860.00
Work Schedule
Standard Hours
Benefits
Health Insurance
Retirement Plan
Paid Time Off
Stock bonuses
Vacation pay
Employee Discounts
Flexible work hours
Job Description
Intel Corporation is a leading global technology company renowned for its innovation and excellence in semiconductor design and manufacturing. With a strong reputation for pushing the boundaries of computing, Intel provides cutting-edge solutions for various industries, including computing, communications, and consumer electronics. The company cultivates a collaborative and inclusive work environment focused on creativity, continuous learning, and employee growth. Intel's commitment to sustainability, diversity, and corporate responsibility further solidifies its standing as a top employer in the technology sector. The facilities in California, such as the campuses in Folsom and Santa Clara, serve as hubs for advanced research, development, and production, offering employees the resources and environment to thrive.
This position is for an experienced hire to work as a Mixed Signal Pre-Silicon Validation Engineer in Intel's California locations, primarily Folsom and Santa Clara. The role requires a regular onsite presence and offers a hybrid work model, allowing some flexibility between working on-site and remotely. The position involves defining, developing, and executing pre-silicon functional validation processes for mixed signal designs, electronic parts, components, and integrated circuits crucial to Intel’s advanced hardware products. A typical workday includes applying a variety of hardware and software tools to ensure comprehensive validation coverage while meeting performance, power, and area targets.
The engineer will collaborate across multiple teams involving architecture, design, verification, and manufacturing to enhance validation methodologies, address design changes, and troubleshoot issues. Key responsibilities include developing mixed signal validation methodologies, debugging functional and triage failures, and publishing detailed validation reports. This role demands a deep understanding of System Verilog, OVM, UVM methodologies, and experience working with memory interfaces such as DFI, DDR, and LPDDR protocols.
Intel offers a competitive salary range for this role, between $122,440 and $172,860 annually, complemented by stock bonuses and comprehensive benefits such as health and retirement plans. The company emphasizes ethical hiring practices and equal opportunity, ensuring a supportive and fair recruitment process. Joining Intel means contributing to high-impact technology projects in a dynamic environment where innovation is encouraged and staff are empowered to advance their careers in a company committed to excellence and social responsibility.
This position is for an experienced hire to work as a Mixed Signal Pre-Silicon Validation Engineer in Intel's California locations, primarily Folsom and Santa Clara. The role requires a regular onsite presence and offers a hybrid work model, allowing some flexibility between working on-site and remotely. The position involves defining, developing, and executing pre-silicon functional validation processes for mixed signal designs, electronic parts, components, and integrated circuits crucial to Intel’s advanced hardware products. A typical workday includes applying a variety of hardware and software tools to ensure comprehensive validation coverage while meeting performance, power, and area targets.
The engineer will collaborate across multiple teams involving architecture, design, verification, and manufacturing to enhance validation methodologies, address design changes, and troubleshoot issues. Key responsibilities include developing mixed signal validation methodologies, debugging functional and triage failures, and publishing detailed validation reports. This role demands a deep understanding of System Verilog, OVM, UVM methodologies, and experience working with memory interfaces such as DFI, DDR, and LPDDR protocols.
Intel offers a competitive salary range for this role, between $122,440 and $172,860 annually, complemented by stock bonuses and comprehensive benefits such as health and retirement plans. The company emphasizes ethical hiring practices and equal opportunity, ensuring a supportive and fair recruitment process. Joining Intel means contributing to high-impact technology projects in a dynamic environment where innovation is encouraged and staff are empowered to advance their careers in a company committed to excellence and social responsibility.
Job Requirements
- Bachelors degree in Computer Science, Computer Engineering or Electrical Engineering or another STEM related degree with 3+ years experience or Masters degree in Computer Science, Computer Engineering or Electrical Engineering or another STEM related degree with 6+ months experience
- Experience working on IP or SoC development, verification, or integration using System Verilog/OVM/UVM
- Experience writing and implementing validation plans using System Verilog
Job Qualifications
- Bachelors degree in Computer Science, Computer Engineering or Electrical Engineering or another STEM related degree with 3+ years experience or Masters degree in Computer Science, Computer Engineering or Electrical Engineering or another STEM related degree with 6+ months experience
- Experience working on IP or SoC development, verification, or integration using System Verilog/OVM/UVM
- Experience writing and implementing validation plans using System Verilog
- Preferred 2+ years of experience with DFI/DDR/LPDDR protocols
- Preferred 2+ years of experience with DDR Phy verification or Memory Controller verification
Job Duties
- Define, develop, and perform pre-silicon functional validation for mixed signal design, electronic parts, components, and integrated circuitry
- Apply hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met
- Review proposed design changes to assess impact on validation plans, tasks, and timelines
- Develop mixed signal validation methodologies, execute validation plans, and collaborate with other engineers for design optimization, troubleshooting, and failure analysis
- Perform debug to identify root causes and resolve all functional and triage failures for mixed signal design issues
- Test interactions between various mixed signal design features using validation infrastructure
- Develop pre-silicon validation infrastructure such as monitors, behavioral checkers, coverage, and test environments used in validation testing
- Publish mixed signal validation reports summarizing all validation activities performed, review results, and communicate findings to relevant teams
- Work with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for mixed signal interfaces to meet desired product specifications
Job Criteria
Experience
Mid Level (3-7 years)
Job Location
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